[Click for the bga-6.fe datafile in a second window.]
This model shows how to prevent too large a blob of solder from
penetrating the upper and lower boards.
Notable features:
The vertical load has been increased to 500 to give a squashed BGA.
The top and bottom barriers are implemented as one-sided
constraints, constraints 4 and 5. All the vertices, edges, and
faces of the solder surface are put on those constraints (except
those already on the pad constraints). Don't forget the edges
and faces, since that's how vertices made during refinement
inherit the constraints.
Vertices on a one-sided constraint that
are exactly on the constraint are said to "hit" the
constraint. Vertices that hit a one-sided constraint
are sometimes awkward, bouncing on and off. So there
are two further constraints, 6 and 7, that are exact
constraints for the lower and upper barrier. There is
a command "nail" to transfer vertices that hit the
one-sided constraints to the exact constraints, and
a command "unnail" to transfer them back to one-sided.
